Verification of Transactional Memories that Support Non-Transactional Memory Accesses
نویسندگان
چکیده
A major challenge of Transactional memory implementations is dealing with memory accesses that occur outside of transactions. In previous work we showed how to specify transactional memory in terms of admissible interchanges of transaction operations, and gave proof rules for showing that an implementation satisfies its specification. However, we did not capture non-transactional memory accesses. In this work we show how to extend our previous model to handle non-transactional accesses. We apply our proof rules using a PVS-based theorem prover and produce a machine checkable, deductive proof for the correctness of implementations of transactional memory systems that handle non-transactional memory accesses.
منابع مشابه
Mechanical Verification of Transactional Memories with Non-transactional Memory Accesses
Transactional memory is a programming abstraction intended to simplify the synchronization of conflicting memory accesses (by concurrent threads) without the difficulties associated with locks. In a previous work we presented a formal framework for proving that a transactional memory implementation satisfies its specifications and provided with model checking verification of some using small in...
متن کاملOn the analytical modeling of concurrency control algorithms for Software Transactional Memories: The case of Commit-Time-Locking
We present an analytical performance modeling approach for concurrency control algorithms in the context of Software Transactional Memories (STMs). We consider a realistic execution pattern where each thread alternates the execution of transactional and non-transactional code portions. Our model captures dynamics related to the execution of both (i) transactional read/write memory accesses and ...
متن کاملAnalytical Modelling of Commit-Time-Locking Algorithms for Software Transactional Memories
We present an analytical performance modeling approach for concurrency control algorithms in the context of Software Transactional Memories (STMs). Unlike existing approaches, we consider a realistic execution pattern where each thread alternates the execution of transactional and non-transactional code portions. Also, our model captures dynamics related to the execution of both transactional r...
متن کاملFastLane: Software Transactional Memory Optimized for Low Numbers of Threads
Software transactional memory (STM) can lead to scalable implementations of concurrent programs, as the relative performance of an application increases with the number of threads that support it. However, the absolute performance is typically impaired by the overheads of transaction management and instrumented accesses to shared memory. This often leads a STM-based program with a low thread co...
متن کاملChallenges to Providing Performance Isolation in Transactional Memories
Due to the inevitability of chip multiprocessors and the difficulty of parallel software development, there has been widespread interest in techniques that facilitate parallel programming. Recently, there have been a number of proposals regarding hardware support for transactional programming models. A key advantage of transactional programming models over lock-based synchronization is that two...
متن کامل